How often does the "slow path" actually trigger? With 32 TLB entries covering 128 KB, Intel claimed a 98% hit rate for typical workloads of the era. That sounds impressive, but a 2% miss rate means a page walk every 50 memory accesses -- still quite frequent. So the 386 overlaps page walks with normal instruction execution wherever possible. A dedicated hardware state machine performs each walk:
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CTC (English, punctuation & capitalization):
第三十七条 爆炸性、毒害性、放射性、腐蚀性物质或者传染病病原体等危险物质被盗、被抢或者丢失，未按规定报告的，处五日以下拘留；故意隐瞒不报的，处五日以上十日以下拘留。，这一点在WPS官方版本下载中也有详细论述